Phased locked loop circuits (PLLs) are typically used whenever a periodic signal is to be generated whose frequency is an accurate multiple of the frequency of a very stable and low noise reference signal. A PLL is also used where the phase of an output signal has to track the phase of the reference signal. Applications include the generation of local oscillator signals in radio receivers and transmitters, as well as in clock recovery of digital communication systems.
The PLL is a closed loop feedback control system that continuously tries to reduce the error between the frequency or phase of its output signal and that of the reference. A typical PLL has what is referred to as a loop filter that connects a phase detector to a voltage controlled oscillator (VCO). The phase detector responds to the phase error between the reference and a feedback signal derived from the output, by making adjustments to a voltage signal in proportion to the phase error. Rather than directly applying the voltage signal to the input of the VCO, however, the signal is conditioned by the filter to produce the control voltage that adjusts the output frequency of the VCO. The filter is designed to help maintain the control loop stable, so that the loop does not enter an oscillatory condition. The filter may be viewed as smoothing out the input voltage to the VCO. The input voltage to the VCO adjusts the output frequency until, for example, a reference clock edge and a feedback clock edge are aligned.
In a conventional PLL, the phase detector may be realized by a phase frequency detector (PFD) that detects the phase error between the reference and feedback signals, and produces voltage pulses the widths of which are proportional to the phase error. These pulses may then be converted to electrical current pulses by a charge pump. Charge is dumped directly from the charge pump to the filter.